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DTSTAMP:20210402T160023Z
LOCATION:Poster Module
DTSTART;TZID=America/New_York:20201117T083000
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UID:submissions.supercomputing.org_SC20_sess342_drs107@linklings.com
SUMMARY:High Throughput Low Latency Online Image Processing by GPU/FPGA Co
 processors Using RDMA Techniques
DESCRIPTION:Doctoral Showcase, Posters\n\nHigh Throughput Low Latency Onli
 ne Image Processing by GPU/FPGA Coprocessors Using RDMA Techniques\n\nPons
 ard, Houzet, Janvier\n\nThe constant evolution of X-ray photon sources ass
 ociated with the increasing performance of high-end X-ray detectors allows
  cutting-edge experiments generate large volumes of data that are challeng
 ing to manage and store. These data management challenges have still not b
 een addressed in a fully satisfactory way as of today, and in any case, no
 t in a generic manner.<br /><br />This thesis is part of the ESRF RASHPA p
 roject that aims at developing an RDMA-based Acquisition System for High P
 erformance Applications. One of the main characteristics of this framework
  is the direct data placement, straight from the detector head (data produ
 cer) to the processing computing infrastructure (data receiver), at the hi
 ghest acceptable throughput, using RDMA techniques. <br /><br />The work c
 arried out in this thesis is a contribution to the RASHPA framework, enabl
 ing data transfer directly to the internal memory of accelerator boards. A
  low-latency synchronisation mechanism is proposed to trigger data process
 ing while keeping pace with the detector. Thus, a comprehensive solution f
 ulfilling the online data analysis challenges is proposed on standard comp
 uter and massively parallel coprocessors as well.<br /><br />Scalability a
 nd versatility of the proposed approach is exemplified by detector emulato
 rs, leveraging RoCEv2 or PCI-e and RASHPA Processing Units (RPUs) such as 
 GPUs and FPGAs. Real-time data processing on FPGA, seldom adopted in X-ray
  science, is evaluated and the benefits of high level synthesis are exhibi
 ted. The assessment of the proposed data analysis pipeline includes raw da
 ta pre-treatment for Jungfrau detector, image rejection using Bragg's peak
 s counting and data compression to sparse matrix format.\n\nRegistration C
 ategory: Tech Program Reg Pass, Exhibits Reg Pass
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