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DTSTAMP:20210402T160558Z
LOCATION:Track 6
DTSTART;TZID=America/New_York:20201113T100500
DTEND;TZID=America/New_York:20201113T103500
UID:submissions.supercomputing.org_SC20_sess225_ws_h2rc109@linklings.com
SUMMARY:Programming Reconfigurable Heterogeneous Computing Clusters Using 
 MPI with Transpilation
DESCRIPTION:Workshop\n\nProgramming Reconfigurable Heterogeneous Computing
  Clusters Using MPI with Transpilation\n\nRinglein, Abel, Ditter, Weiss, H
 agleitner...\n\nWith the slowdown of Moore’s law and the stop of Dennard s
 caling, energy efficiency of compute hardware translates to compute power.
  Therefore, high-performance computing (HPC) systems tend to rely more and
  more on accelerators such as field-programmable gate arrays (FPGAs) to fu
 el highly demanding workloads, like Big Data applications or deep neuronal
  networks. These FPGAs are reconfigurable and sometimes no longer bus-atta
 ched to a CPU but directly connected to the data center network fabric as 
 standalone nodes. This mix of CPUs and FPGAs leads to the creation of Reco
 nfigurable Heterogeneous HPC (ReH2PC) clusters for which no established pr
 ogramming model exists, despite many proposals in the past. In contrast to
  this, the Message Passing Interface (MPI) has evolved as the de-facto sta
 ndard to program classical HPC clusters, due to its high re-usability and 
 to fast development of applications. This paper revisits the programming m
 odel of ReH2PC clusters and argues that MPI is suitable for programming he
 terogeneous clusters of FPGAs and CPUs.\n\nWe demonstrate a one-click solu
 tion for compiling and deploying a standard MPI application on ReH2PC clus
 ters. Our framework implements a High-Level Synthesis (HLS) library, a spe
 cific run-time environment for FPGAs and CPUs, and a transpiler that close
 s the semantic gap between the MPI API and FPGA designs. Our experiments w
 ith 31 FPGAs show an average speedup of 4x and a 90% reduction of power co
 nsumption compared to a cluster of CPUs.\n\nTag: Accelerators, FPGA, and G
 PUs, Architectures, Emerging Technologies, Heterogeneous Systems, Reconfig
 urable Computing\n\nRegistration Category: Workshop Reg Pass
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