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DTSTART:19700308T020000
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DTSTAMP:20210402T160555Z
LOCATION:Track 8
DTSTART;TZID=America/New_York:20201112T175000
DTEND;TZID=America/New_York:20201112T181500
UID:submissions.supercomputing.org_SC20_sess214_ws_lasalss106@linklings.co
 m
SUMMARY:Performance Analysis of a Quantum Monte Carlo Application on Multi
 ple Hardware Architectures Using the HPX Runtime
DESCRIPTION:Workshop\n\nPerformance Analysis of a Quantum Monte Carlo Appl
 ication on Multiple Hardware Architectures Using the HPX Runtime\n\nWei, C
 hatterjee, Huck, Hernandez, Kaiser\n\nThis paper describes how we successf
 ully used the HPX programming model to port the DCA++ application on multi
 ple architectures that include POWER9, x86, ARM v8, and NVIDIA GPUs. We de
 scribe the lessons we can learn from this experience as well as the benefi
 ts of enabling the HPX in the application to improve the CPU threading par
 t of the code, which led to an overall 21% improvement across architecture
 s. We also describe how we used HPX-APEX to raise the level of abstraction
  to understand performance issues and to identify tasking optimization opp
 ortunities in the code, and how these relate to CPU/GPU utilization counte
 rs, device memory allocation over time, and CPU kernel level context switc
 hes on a given architecture.\n\nTag: Algorithms, Extreme Scale Computing, 
 Performance/Productivity Measurement and Evaluation, Scalable Computing, S
 cientific Computing\n\nRegistration Category: Workshop Reg Pass
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