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DTSTART:19700308T020000
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BEGIN:VEVENT
DTSTAMP:20210402T160554Z
LOCATION:Track 2
DTSTART;TZID=America/New_York:20201112T101000
DTEND;TZID=America/New_York:20201112T103000
UID:submissions.supercomputing.org_SC20_sess208_ws_pmbss103@linklings.com
SUMMARY:Performance Modeling of Streaming Kernels and Sparse Matrix-Vector
  Multiplication on A64FX
DESCRIPTION:Workshop\n\nPerformance Modeling of Streaming Kernels and Spar
 se Matrix-Vector Multiplication on A64FX\n\nAlappat, Laukemann, Gruber, Ha
 ger, Wellein...\n\nThe A64FX CPU powers the current #1 supercomputer on th
 e Top500 list. Although it is a traditional cache-based multicore processo
 r, its peak performance and memory bandwidth rival accelerator devices. Ge
 nerating efficient code for such a new architecture requires a good unders
 tanding of its performance features. Using these features, we construct th
 e Execution-Cache-Memory (ECM) performance model for the A64FX processor i
 n the FX700 supercomputer and validate it using streaming loops. We also i
 dentify architectural peculiarities and derive optimization hints. Applyin
 g the ECM model to sparse matrix-vector multiplication (SpMV), we motivate
  why the CRS matrix storage format is inappropriate and how the SELL-C-&#9
 63; format with suitable code optimizations can achieve bandwidth saturati
 on for SpMV.\n\nRegistration Category: Workshop Reg Pass
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